Thin-film field effect transistor and making method

ABSTRACT

In a thin-film field effect transistor with a MIS structure, the materials of which the semiconductor and insulating layers are made are polymers which are dissolvable in organic solvents and have a weight average molecular weight of more than 2,000 to 1,000,000. Use of polymers for both the semiconductor layer and insulating layer of TFT eliminates such treatments as patterning and etching using photoresists in the prior art circuit-forming technology, reduces the probability of TFT defects and achieves a reduction of TFT manufacture cost.

CROSS-REFERENCE TO RELATED APPLICATION

This Nonprovisional application claims priority under 35 U.S.C. §119(a)on Patent Application No. 2003-304019 filed in Japan on Aug. 28, 2003,the entire contents of which are hereby incorporated by reference.

TECHNICAL FIELD

This invention relates to thin-film field effect transistors (TFTs)utilizing silicon semiconductors or compound semiconductors, especiallyfor use in liquid crystal displays, and a method of fabricating thesame.

BACKGROUND ART

TFTs utilizing silicon semiconductors or compound semiconductors areused in common integrated circuits and in wide-spreading otherapplications. In particular, the use of TFTs in liquid crystal displaysis well known. Nowadays LC displays are making continuous progresstoward larger size and more precise definition. The requirement toincorporate a greater number of TFTs corresponding to the number ofpixels becomes stronger than ever.

However, ordinary metal based semiconductors used in the art cannotavoid the problem that slight defective pixels are caused by the defectsof TFTs formed on the substrate as a result of treatments includingpatterning and etching using photoresists during circuitry formation onthe substrate. Such treatments impose a certain limit in reducing thecost of TFT manufacture. This is also true for other flat displays suchas plasma displays and organic EL displays when TFTs are used therein.

The recent trend toward larger size and more precise definition tends toincrease the probability of defection in the TFT manufacture. It is thusstrongly desired to minimize such TFT defects.

For TFTs with a metal-insulator-semiconductor (MIS) structure, attemptshave been made to use organic materials as the insulator andsemiconductor. For example, JP-A 5-508745 (WO 9201313 or U.S. Pat. No.5,347,144) describes that a device using an insulating organic polymerhaving a dielectric constant of at least 5 as the insulating layer and apolyconjugated organic compound having a weight average molecular weightof up to 2,000 as the semiconductor layer exerts a field effect and hasa mobility of carriers of about 10⁻² cm²V⁻¹s⁻¹. Since the semiconductorlayer is formed by evaporating α-sexithienyl as an organic semiconductormaterial, treatments including patterning and etching using photoresistsare necessary, failing to achieve a cost reduction.

SUMMARY OF THE INVENTION

An object of the present invention is to provide thin-film field effecttransistors (TFTs) having a higher carrier mobility than prior art TFTsand minimized defects, and a method of fabricating the same.

The inventor has discovered that in a TFT with ametal-insulator-semiconductor (MIS) structure, a simple approach ofusing organic solvent-soluble polymers as the materials of which thesemiconductor and insulating layers are made is successful in achievinga greater carrier mobility than in the prior art.

Accordingly, the present invention provides a thin-film field effecttransistor with an MIS structure, wherein the materials of which thesemiconductor and insulating layers are made are polymers which aredissolvable in organic solvents and have a weight average molecularweight of more than 2,000 to 1,000,000.

In another embodiment of the invention, a thin-film field effecttransistor is fabricated by a process involving the steps of dissolvingpolymers having a weight average molecular weight (Mw) of more than2,000 to 1,000,000 in organic solvents, applying the resulting polymersolutions, and drying the applied polymer solutions, thereby forming asemiconductor layer and an insulating layer.

According to the invention, use of polymers for both the semiconductorlayer and insulating layer of TFT eliminates such treatments aspatterning and etching using photoresists or the like in the circuitforming technology using prior art metal based semiconductors andinsulators, reduces the probability of TFT defects and achieves areduction of TFT manufacture cost.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a perspective view of TFT in one embodiment of the invention.

FIG. 2 is a graph of drain current versus drain voltage of TFT in anexample of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

Referring to FIG. 1, a TFT in one embodiment of the invention isillustrated as comprising a substrate 1 of SiO₂ or the like, a metallayer 2 formed on the substrate 1 and serving as a gate electrode, aninsulating layer 3 formed on the metal layer 2, a semiconductor layer 4formed on the insulating layer 3, and source and drain electrodes 5 and6 formed on the semiconductor layer 4.

The metal layer 2 used herein may be a commonly used ITO (indium tinoxide) film, or a film of a single metal such as Au, Cu or Al or alaminate metal film of Au/Ti, Cu/Ti or Al/Ti, deposited by the physicalvapor deposition (PVD) or metal organic chemical vapor deposition(MOCVD) method. Since the objects of the invention favor that the metallayer 2 be formed by printing, it is recommended to useelectroconductive metal pastes if no practical problems are encountered.

In the inventive TFT, the material of which the insulating layer is madeis a polymer or high-molecular weight compound which is dissolvable inan organic solvent and has a weight average molecular weight (Mw) ofmore than 2,000 to 1,000,000, and preferably an insulating polymerhaving cyano groups. Examples include cyanoethyl pullulan, cyanoethylcellulose, cyanoethyl polyvinyl alcohol, and polyacrylonitrile. Theseinsulating polymers having cyano groups are readily obtainable. Forexample, cyanoethyl pullulan is obtained by reacting a pullulan resinwith acrylonitrile in the presence of an alkali catalyst (see JP-B59-31521). The degree of substitution of cyano groups (e.g., degree ofsubstitution of cyanoethyl groups in the case of cyanoethyl pullulan) isdesirably at least 80 mol %, more desirably at least 85 mol %. This isbecause the concentration of polar groups or cyano groups must be abovea certain level in order to produce a TFT having a fully improvedmobility, and a more content of residual hydroxyl groups leads to anincrease in dielectric loss as a loss factor and is sometimesundesirable for the objects of the invention.

In the inventive TFT, the material of which the semiconductor layer ismade is a polymer or high-molecular weight compound which is dissolvablein an organic solvent and has a weight average molecular weight (Mw) ofmore than 2,000 to 1,000,000. Although no other limits are imposed onthe polymer for the semiconductor layer, the polymer should bedissolvable in an organic solvent in which the insulating layer is notdissolvable. This is because it is generally believed that in formingthe semiconductor layer and the insulating layer in a lay-up manner, theinterfacial state does not become uniform.

Past studies on organic TFT employed a method of forming an organicsemiconductor layer on an organic insulating film by evaporation asdescribed in JP-A 5-508745, and a method of forming only an organicsemiconductor layer on an inorganic insulating layer. One exemplarymethod involves dissolving both an organic semiconductor material and anorganic insulating material in an identical organic solvent to formsolutions, coating and drying the organic insulating material solutionto form an organic insulating layer, then applying the organicsemiconductor material solution to the organic insulating layer. At thispoint, the organic insulating material is slightly dissolved at thecoating interface. Eventually the interface between layers of theobtained laminated film after drying is disordered. By contrast, thepresent invention solves the problem by using different organic solventsfor dissolution of a semiconductor material and an insulating material,that is, by combining two organic solvents with two materials such thatone of the materials is not dissolvable in one of the organic solvents.

Specifically, suitable polymers for forming the semiconductor layerinclude polythiophenes, polypyrroles, polyanilines, polyacetylenes,polythienylene vinylenes, and polyphenylene vinylenes. Of these,polythiophenes such as poly(3-hexylthiophene) are preferred because ofsolubility in organic solvents, good processability, stability and ahigh carrier mobility.

Suitable organic solvents for dissolving the polymers of which theinsulating layer is made include N-methyl-2-pyrrolidone,dimethylformamide, acetone, acetonitrile, γ-butyrolactone, etc. Suitableorganic solvents for dissolving the polymers of which the semiconductorlayer is made include chloroform, toluene, hexane, alcohols, etc. Ineither case, the solvent may be used alone or in admixture of two ormore.

According to the invention, a thin-film field effect transistor isfabricated by applying a solution of a polymer having a Mw of more than2,000 to 1,000,000 in a first organic solvent to a gate electrode in theform of a metal layer, drying the applied polymer solution to form aninsulating layer on the metal layer, and forming on the insulating layera semiconductor layer which is dissolvable in a second organic solventin which the insulating layer is not dissolvable. This method may beimplemented using well-known techniques. For example, a metal layerserving as a gate electrode is formed by a sputtering technique on thesubstrate which is selected from glass and ordinary polymer sheets.Alternatively, a metal layer is formed by applying a metal paste orelectroconductive polymer to the substrate by a spin coating, screenprinting or ink jet printing technique, followed by drying. Commerciallyavailable ITO glass may also be used.

An insulating layer is then formed on the thus formed gate electrode, byapplying a solution of the insulating layer-forming material in a firstorganic solvent by a spin coating, screen printing or ink jet printingtechnique, followed by drying. In this case, the insulating layer maypreferably have a thickness of 0.2 to 10 μm, more preferably 0.5 to 3μm. Too thin insulating layer may cause a large leakage current. Toothick insulating layer may require a large driving voltage.

Next, a semiconductor layer is formed on the insulating layer byapplying a solution of the semiconductor layer-forming material in asecond organic solvent in which the insulating polymer is notdissolvable, by a spin coating, screen printing or ink jet printingtechnique, followed by drying. The surface of the insulating layer maybe previously subjected to physical treatment, typically known rubbingtreatment in order that semiconductor molecules be aligned at theinterface between insulating and semiconductor layers.

Finally, source and drain electrodes are formed on the semiconductorlayer by a sputtering technique. Alternatively, a metal paste orelectroconductive polymer is applied by a screen printing or ink jetprinting technique, followed by drying.

The inventive TFT has a structure including an insulating layer formedon a gate electrode in the form of a metal layer and a semiconductorlayer formed on the insulating layer. When an electric potential isapplied to the gate to produce an electric field, electric charges arecreated within the semiconductor in proximity to the insulating layerdue to a field effect, thereby forming a conductive region, called thechannel, within the semiconductor layer between source and drainelectrodes formed on the semiconductor layer. This means that theinterfacial state between insulating and semiconductor layers iscrucial. The flatter interface, the better performs the device.

EXAMPLE

Examples of the invention are given below by way of illustration and notby way of limitation.

Example 1

There were furnished cyanoethyl pullulan having a substitution ofcyanoethyl of 85.2 mol % (CyEPL, Shin-Etsu Chemical Co., Ltd., CR-S,Mw=49,000) as an insulating layer material and poly(3-hexylthiophene)(P3HT, Aldrich, Mw=87,000) as an organic semiconductor layer material.The organic solvent in which P3HT was dissolved was chloroform, in whichCyEPL was insoluble. A TFT was fabricated using these materials andevaluated as follows.

On a glass (SiO₂) substrate, a gate electrode was formed by depositingTi to a thickness of 5 nm and then Au to a thickness of 20 nm, using anRF sputtering technique at room temperature and a back pressure of 10⁻⁴Pa.

An insulating layer was then formed on the gate electrode by dissolving15 wt % CyEPL as the insulating layer material inN-methyl-2-pyrrolidone, passing the solution through a 0.2-micronmembrane filter, spin coating the solution, and drying at 100° C. forone hour.

A semiconductor layer of 50 nm thick was then formed on the insulatinglayer by dissolving 0.8 wt % P3HT in chloroform, passing the solutionthrough a 0.2-micron membrane filter, spin coating the solution, anddrying at 100° C. for one hour.

The substrate was cooled at −20° C. Au was deposited to a thickness of300 nm on the organic semiconductor layer through a metal mask, using anRF sputtering technique at a back pressure below 10⁻⁵ Pa. There wereformed two gold electrodes of 4 mm wide spaced a distance of 50 μm (seeFIG. 1, L=50 μm and W=4 mm) serving as source and drain electrodes.

Comparative Example 1

There were furnished cyanoethyl pullulan having a substitution ofcyanoethyl of 85.2 mol % (CyEPL, Shin-Etsu Chemical Co., Ltd., CR-S) asan insulating layer material and copper phthalocyanine (CuPc) as anorganic semiconductor layer material. A TFT was fabricated using thesematerials and evaluated as follows.

On a glass (SiO₂) substrate, a gate electrode was formed by depositingTi to a thickness of 5 nm and then Au to a thickness of 20 nm, using anRF sputtering technique at room temperature and a back pressure of 10⁻⁴Pa.

An insulating layer was then formed on the gate electrode by dissolving15 wt % CyEPL as the insulating layer material inN-methyl-2-pyrrolidone, passing the solution through a 0.2-micronmembrane filter, spin coating the solution, and drying at 100° C. forone hour.

A semiconductor layer of 50 nm thick was then formed on the insulatinglayer by depositing CuPc, using an RF sputtering technique at roomtemperature and a back pressure of 10⁻⁵ Pa.

The substrate was cooled at −20° C. Au was deposited to a thickness of300 nm on the organic semiconductor layer through a metal mask, using anRF sputtering technique at a back pressure below 10⁻⁵ Pa. There wereformed two gold electrodes of 4 mm wide spaced a distance of 50 μmserving as source and drain electrodes.

Comparative Example 2

There were furnished SiO₂ as an insulating layer material and copperphthalocyanine (CuPc) as an organic semiconductor layer material. A TFTwas fabricated using these materials and evaluated as follows.

A p-type doped silicon substrate was annealed in a furnace to form anoxide film (SiO₂) of 300 nm thick as an insulating film. Then only theback surface of the substrate which had not been mirror finished wastreated with hydrofluoric acid to remove the oxide film. On only theback surface thus treated, a gate electrode was formed by depositing Tito a thickness of 5 nm and then Au to a thickness of 20 nm, using an RFsputtering technique at room temperature and a back pressure of 10⁻⁴ Pa.

A semiconductor layer of 50 nm thick was then formed on the surface ofthe oxide film serving as the insulating layer, by depositing CuPc,using an RF sputtering technique at room temperature and a back pressurebelow 10⁻⁵ Pa.

The substrate was cooled at −20° C. Au was deposited to a thickness of300 nm on the organic semiconductor layer through a metal mask, using anRF sputtering technique at a back pressure below 10⁻⁵ Pa. There wereformed two gold electrodes of 4 mm wide spaced a distance of 50 μmserving as source and drain electrodes.

[TFT Evaluation]

Each of the devices thus fabricated was placed in a vacuum prober wherethe substrate was heated at 50° C. and allowed to stand in a vacuum(below 10⁻⁴ Torr) for one hour. In the prober under vacuum,light-shielded conditions, the TFT characteristics were determined by asemiconductor parameter analyzer SCS4200 by Keithley.

The results are shown in Table 1.

Drain current versus voltage (I_(SD)−V_(SD)) curves representing thefield effect of TFT of Example 1 are shown in the graph of FIG. 2. TABLE1 Insulating Semiconduct layer or layer Mobility Threshold materialmaterial (cm²V⁻¹s⁻¹) (V0) Example 1 CyEPL P3HT 4.0 × 10⁻¹ −9.0Comparative CyEPL CuPc 2.0 × 10⁻³ −7.0 Example 1 Comparative SiO₂ CuPc2.0 × 10⁻⁴ −0.13 Example 2

The results of Comparative Examples 1 and 2 suggest that use of CyEPL asthe organic insulating layer material provides a greater mobility thanconventional SiO₂. Although the TFT of Example 1 was fabricated by themethod which is generally believed to achieve no improvement in mobilitydue to disordered interface, that is, in which both the organicinsulating layer and the organic semiconductor layer are formed bycoating and drying, the TFT of Example 1 exhibits a significantly highmobility. The inventive TFT has an improved mobility because the channelformation would be enhanced by polar groups aligned at the interfacebetween insulating and semiconductor layers, when a potential is appliedto the gate.

Japanese Patent Application No. 2003-304019 is incorporated herein byreference.

Although some preferred embodiments have been described, manymodifications and variations may be made thereto in light of the aboveteachings. It is therefore to be understood that the invention may bepracticed otherwise than as specifically described without departingfrom the scope of the appended claims.

1. A thin-film field effect transistor with ametal-insulator-semiconductor structure, wherein the materials of whichthe semiconductor and insulating layers are made are polymers which aredissolvable in organic solvents and have a weight average molecularweight of more than 2,000 to 1,000,000.
 2. The thin-film field effecttransistor of claim 1, wherein the polymer of which the insulating layeris made is an insulating polymer having cyano groups.
 3. The thin-filmfield effect transistor of claim 1, wherein the material of which thesemiconductor layer is made is a polythiophene.
 4. A method forfabricating a thin-film field effect transistor, comprising the stepsof: applying a solution of a polymer having a weight average molecularweight of more than 2,000 to 1,000,000 in a first organic solvent to agate electrode in the form of a metal layer, drying the applied polymersolution to form an insulating layer on the metal layer, and forming onthe insulating layer a semiconductor layer which is dissolvable in asecond organic solvent in which the insulating layer is not dissolvable.